Super junction MOSFET switching speed and conduction loss problem

Super junction MOSFET switching speed and conduction loss problem:

The Super Junction technology was developed for high voltage power semiconductor devices with breakdown voltages above 600V, which has been used to improve the trade-off between on-resistance and breakdown voltage. The use of super junction technology helps to reduce on-resistance and increase the switching speed of the MOSFET. However, as the switching speed of the MOSFET increases, the source-level connection inductance in the package generates a back EMF, which begins to adversely affect the switching speed, and the conduction loss becomes larger.

Solve these problems with the TO-247-4L package:

A super-junction MOSFET in the TO-247-4L package can solve this problem. The 4-pin TO-247-4L package has a Kelvin source connection for the gate drive loop, which reduces the effects of internal source-level connection inductance. Therefore, the combination of a super-junction MOSFET and a 4-pin TO-247-4L package is ideal for high speed applications.

Analysis of the Mechanism of TO-247-4L Package Using Simulation Technology

Toshiba used SPICE simulation technology to analyze the mechanism of the 4-pin TO-247-4L package. The back EMF VLS generated in the 3-pin TO-247 package has not been verified in the 4-pin TO-247-4L package. The gate-switching speed of the 4-pin TO-247-4L package is faster than the gate switching speed of the 3-pin TO-247 package. Therefore, the 4-pin TO-247-4L package helps increase MOSFET switching speed and reduce conduction losses, and helps to suppress gate oscillations after turn-off.

We simulated the 4-pin TO-247-4L and 3-pin TO-247 packages using the same MOSFET device model. The 4-lead TO-247-4L package is modeled by dividing the source lead into two parts and then connecting the two parts to the gate and drain, respectively. The 3-lead TO-247 package and the 4-pin are shown below. Simulation model for the TO-247-4L package.

TO-247-4L package helps increase MOSFET switching speed

It is verified by simulation technology that since the source LSource generates the counter electromotive force VLS, the voltage passing through the MOSFET is not equal to the total driving voltage VDRV. The back EMF VLS and gate-source VGS waveforms of the 3-pin package when the MOSFET is turned on are shown in the figure below. The part highlighted by the circle in the figure is the actual voltage of the LSource. This voltage reduces the voltage across the gate and source. Therefore, as shown by the VGS waveform of the 3-pin package, the gate voltage drops after turn-on, reducing the turn-on speed. In a 4-pin package, the VGS voltage across the MOSFET is almost equal to VDRV. Therefore, the 4-pin package helps increase the MOSFET switching speed compared to the 3-pin package.

TO-247-4L package reduces conduction loss

We also verified that the use of the TO-247-4L package helps reduce conduction losses through simulation and actual measurement data. The figure below shows the drain-to-source voltage (VDS) and drain current (ID) obtained through simulation and actual measurements. Based on simulation results using the 3-pin and 4-pin models, the 4-pin package has a faster switching speed. In addition, we compared actual results with a 3-pin package TK62N60X with the same current rating and a 4-pin package TK62Z60X. The results confirm that the 4-pin package is faster than the 3-pin package. The conduction loss is reduced by 19% due to the increased switching speed.

Turning off the TO-247-4L package helps suppress gate oscillations

Turning off the TO-247-4L package helps to suppress gate oscillations. In addition to reducing conduction losses, the TO-247-4L package also helps to suppress gate oscillations after turn-off. The following figure shows the simulation results showing the VGS waveform when the MOSFET is turned off. VGS refers to the voltage between A and B in the 4-pin TO-247-4L package circuit. The gate oscillation amplitude of the 4-pin package is smaller than that of the 3-pin package. smaller.

Toshiba used simulation technology to analyze the mechanism of the 4-pin TO-247-4L package and verified that the back EMF generated in the 3-pin TO-247 package is not generated in the 4-pin TO-247-4L package, 4 pins The TO-247-4L package has a fast switching speed that reduces conduction losses by 19%. The simulation results also show that the gate oscillation can be suppressed in a 4-pin TO-247-4L package.

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