LDO is also a linear regulator circuit that subtracts excess voltage from the applied input voltage to produce a regulated output voltage. LDO (low dropout) regulators typically use power transistors (also known as transfer devices) as PNPs. This article will talk about the PSRR calculation of LDO for analog circuit applications.
A low-dropout or LDO regulator is a DC linear voltage regulator that can regulate the output voltage even when the supply voltage is very close to the output voltage. It is the legendary ubiquitous voltage regulator circuit.
The original intention of the author of this circuit is to see if the PSRR has deteriorated significantly after I adjusted the input voltage. Because there were some people who did the LDO before, but the input was 1.2V of bandgap. After the author changed the input to 0.8V, he changed something slightly: for example, the input pair of the previous OTA was changed from pmos to nmos. Then, because the PSRR requirements of this LDO are relatively high, the author has a little bang on the PSRR calculation.
Let's start with books!
The above picture is from "Analog Integrated Circuit Design, 2nd EdiTIon, Tony Chan Carusone, David Johns, Kenneth MarTIn"
Anyway, we have to consider the frequency response characteristics of a system. The first thing we can't run is the loop gain. Therefore, loop gain can be calculated according to the following formula, including two predictable poles: one at the OTA's output and one at the LDO's output:
It can be seen that the PSRR at DC is actually part of the DC gain of the entire system. Therefore, to get a large PSRR, you need a larger gain OTA, which is expected.
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