Phase jitter performance of less than 500fs, combined with low operating power, opens a new family of programmable timing products for high performance applications
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IDT Corporation (IDT) today announced the VersaClock_6 family of programmable clock generators that provide highly flexible and low power timing solutions for demanding high performance applications. With an RMS (root mean square) phase jitter of less than 500 femtoseconds (fs), the VersaClock6 family delivers the best performance of the award-winning IDT VersaClock family with jitter performance, flexibility and low operating power Outstanding combination.
The new device has RMS phase jitter of less than 500fs over the entire 12 kHz to 20 MHz integration range, meeting 10 Gigabit Ethernet, enterprise storage SAS and ASTA, PCI Express Gen 1/2/3, XAUI, SRIO, Strict The PHY reference clock and the applications and standards of the latest generation of high-end FPGAs require stringent jitter and phase noise, while all new devices can operate at approximately half the core power of competing products. The new device's core current is 30mA, which not only simplifies the system's thermal requirements, but also reduces the operating power cost of the system. In addition, VersaClock 6 device pins are compatible with VersaClock 5 devices, allowing performance to be extended with minimal design changes.
Kris Rausch, general manager of IDT's multi-market timing division, said: "These new VersaClock products deliver unmatched low power consumption in the same level of performance programmable clock generators. VersaClock 6 devices enable customers to meet the rigor of their systems. Jitter and low power requirements while reducing board space and bill of materials. With its superior combination of low phase jitter and low power, VersaClock 6 devices are ideal for high-end consumer electronics, networking, computing, industrial and communications markets. Claim."
The VersaClock 6 programmable clock generator provides a universal output pair that can be independently configured for LVDS, LVPECL, HCSL or dual LVCMOS and can independently generate any frequency from 1 MHz to 350 MHz on each output pair. The new devices released this time include:
· 5P49V6901 can realize four outputs at any frequency
· 5P49V6913 can realize two outputs at any frequency
· 5P49V6914 can realize three outputs at any frequency
The high flexibility of the VersaClock 6 allows customers to get the features they really need in a cost-effective way, while the excellent RMS phase jitter performance meets the requirements of high-performance applications, and the phase noise performance is also in line with the latest FPGA specifications.
The VersaClock 6 device is available in a 4 x 4mm 24-VFQFPN package and is pin compatible with VersaClock 5 devices for performance scaling with minimal design changes.
Price and availability
VersaClock 6 series devices are available now, with a price of $ 5.20 for 1K quantities of 5P49V6901 1K, $4 for 5P49V6914 and $3.20 for 5P49V6913.
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