Xilinx Programmable Logic Device Design and Development (Basic) Serial 19: Spartan

Chapter 5 Virtex-6 Series FPGA

Virtex-6 is Xilinx's next-generation flagship product launched in February 2009. It uses the third-generation Xilinx ASMBL architecture and 40nm process to provide up to 760,000 logic cells, the industry's lowest cost, lowest power, highest density, performance. The highest and most bandwidth FPGA. The product is optimized for hard core IP, transceiver and development tool support, while supporting higher bandwidth while supporting a wider range of communication standards and higher performance. Virtex-6 has the following features.

(1) The three sub-platforms, the resource comparison relationship between the platforms is shown in Figure 5-1.

LXT platform: Applicable to high-speed serial connections, while applications with high performance requirements for logic resources.

SXT platform: For high-speed serial connections, the most demanding applications for DSP processing.

HXT platform: For applications with the highest bandwidth requirements for serial connections.

Virtex-6 series resource comparison

Figure 5-1 Resource Comparison of the Virtex-6 Series

(2) Compatibility between sub-platforms.

LXT and SXT devices are pin compatible if the package is the same.

(3) Advanced high performance FPGA logic resources.

True 6-input LUT technology.

Dual LUT5 options.

LUT/double trigger pair.

Improve wiring efficiency.

Each LUT can be configured as a 64-bit (or two 32-bit) distributed LUT RAM.

SRL32/double SRL16 with register output.

Powerful Clock Management Module (MMCM).

(4) 32kbit BRAM/FIFO, operating frequency up to 600MHz, and can be split into two 18kbit to increase BRAM bandwidth.

(5) High-performance parallel SelecTIO technology supporting DDR3.

(6) Advanced 25 & TImes; 18 multiply and accumulate module DSP48E1.

(7) Flexible configuration mode, support SPI, mulTI-boot function.

(8) System Monitor system monitoring function.

(9) Integrated PCIe2.0 hard core, support Gen1/Gen2, &TImes; 1/2/×4/×8 mode with endpoint and root port functions.

(10) The GTX transceiver supports transmission rates from 150 Mbit/s to 6.5 Gbit/s.

(11) The GTH transceiver supports 2.488 Gbit/s to over 11 Gbit/s transmission rate.

(12) Integrated 10/100/1000 Mbit/s Ethernet MAC module.

Application GTX can support 1000BASE-X PCS/PMA and SGMII.

Application SelectIO can support MII/GMII/RGMII.

Supports 2500Mbit/s transmission rate.

(13) 40nm copper process, CMOS technology.

(14) 1.0V nuclear voltage (-1, -2, -3 speed grade).

(15) Support for 0.9V core voltage (-1L speed grade).

(16) High Flip-Chip package for high signal integrity.

5.1 Virtex-6 internal module

This section will detail the internal modules of the Virtex-6 family of devices, so that the reader can have a deeper understanding of the internal modules of the Virtex-6 series FPGAs, because only by deeply understanding the internal structure of the FPGA can it be used effectively, which can To a large extent, the designer's design optimization ability is improved - with fewer resources, more functions and higher performance.

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