This paper proposes a high-resolution graphics image compression scheme based on the FH8735 video and audio encoder, which can complete the collection and compression of video, and send the compressed video data to the host storage through the PCI bus, or output through the Ethernet network interface to Realize remote real-time monitoring.
1 Overall design
The high-resolution graphic image compression scheme based on FH8735 video and audio encoder is composed of acquisition circuit, clock circuit, FH8735 compression circuit, network interface and power circuit. The overall block diagram of the scheme is shown in Figure 1.
Each part of the circuit in Figure 1 is introduced as follows:
(1) Video acquisition circuit. It is composed of input matching and video acquisition circuit to complete the collection of high-resolution video;
(2) Clock circuit. Composed of high-performance crystal oscillator, providing stable clock for video acquisition circuit and FH8735;
(3) FH8735 compression circuit. Composed of FH8735 audio and video encoder, DDR memory, complete video compression processing, and provide PCI interface and network interface control;
(4) Network interface. External PHY chip, providing Ethernet interface;
(5) Power supply circuit. Provide the required power for each functional circuit.
2 Main design
2.1 Video capture circuit
The video acquisition circuit is composed of TI's video image decoder TVP7002. As a high-performance video image decoder, TVP7002 has the following main functions and performance characteristics:
(1) DC accuracy: 8/10 bits;
(2) Analog gain range: -6 ～ 6dB;
(3) Input component video signal resolution: 480i / 576i ～ 1080p;
(4) Input graphic signal resolution: VGA ～ UXGA;
(5) Digital video output format: YCbCr 4: 2: 2 and RGB / YCbCr 4: 4: 4;
(6) I2C bus interface.
The video acquisition circuit design composed of the video image decoder TVP7002 as the core is shown in Figure 2:
After VGA video input, after signal matching and filtering, you can access the TVP7002 decoder. The working state of the TVP7002 decoder is set by the FH8735 video and audio encoder through the I2C bus according to the signal characteristics and processing requirements.
2.2 FH8735 video compression
FH8735 is a high-performance audio and video coding chip developed by Fuhan Microelectronics. Its main technical features are as follows:
(1) Coding standard: ITU-T rrcommendaTIon H.264 ISO / IEC 14496-10 advanced video coding standard (MPEG4 Part 10), supporting H.264 Main Profile and Baseline Profile;
(2) Support maximum resolution: 2048 & TImes; 1024;
(3) Support 1ch 1080i HD / 2ch 720pi HD / 8ch D1 input;
(4) 8-channel I2S input interface; can be configured as master mode and slave mode;
(5) PCI interface, 32bit, clock frequency 33 / 66MHz;
(6) 2 independent DDR SDRAM controllers, each controller has a word width of 32bit;
(7) A MII / RMII interface supports two speeds of 100 / 10Mbps, fully compatible with IEEE802.3 specifications;
(8) One video output interface, in line with BT.656 video standard;
(9) 2 independent I2C interfaces;
(10) JTAG download and debug interface;
(11) 16 bidirectional GPIO.
FH8735 supports H.264 Main profile and Baseline profile video compression formats. It can perform 8-channel SD 480i / 576i real-time encoding, and can also encode one 1080i and two 720p HD signals in real time. In addition to high-performance video encoding capabilities, FH8735 provides a wealth of video pre-processing functions for input video deinterlace, de-noise, OSD overlay, zoom, motion detection and other processing. In order to configure external video and audio receiving chips, FH8735 provides two completely independent standard I2C interfaces to cope with possible I2C address conflicts of external devices. As a coding coprocessor, FH8735 is equipped with a flexible host interface. The host can communicate with FH8735 through PCI or HPI interface for control and status information, or access FH8735 external DDR SDRAM. There are two sets of independent DDR controllers inside FH8735, and one or two sets of external DDR SDRAM can be configured according to the actual system requirements for encoder performance.
In order to meet the needs of some applications for preview video, FH8735 has a standard set of BT.656 video output ports, which can split and merge the multi-channel preview video output through the video pre-processing unit as needed, and encode it into a BT.656 format Video output.
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