Principle Analysis and Application of MSP430 Low Power Operation Mode

The MSP430 family is a 16-bit ultra low power hybrid microcontroller with a reduced instruction set. It includes a flexible clock system with von Neumann Structured Addressing (MAB) and Data Storage (MDB). The MSP430 provides a solution for mixed-signal applications due to a CPU with a standard address mapping and digital analog peripheral interface. .

1, MSP430 advantages

Compared to the well-known 8-bit 51-series microcontrollers with complex instruction sets, the MSP430 family of 16-bit reduced instruction sets is more powerful and faster.

(1) Flexible clock system

The clock system is specifically designed for battery powered applications. A low frequency clock is driven directly by a 32kHz crystal oscillator (ACLK). The integrated high-speed digitally controlled oscillator (DCO) acts as the primary clock source for the CPU and high-speed peripherals. The DOC setup hold time is less than 6μs. The MSP430-based high-performance 16-bit RISC processor is designed to achieve efficient data transfer over short distances.

(2) embedded simulation

The MSP430 device itself has dedicated emulation logic, embedded emulation through the JTAG port, no need to attach any peripheral circuits, the advantages are as follows: support full-speed execution, online debugging, set breakpoints and single-step tracking; online debugging design and final application have The same characteristics; protect the integrity of the mixed signal and are not subject to line interference.

(3) Address space MSP430

The Von Neumann architecture can share an address space with Special Function Registers (SFRs). The code segment is stored in an even address, and the data segment access unit is byte or word, and the addressable space can be expanded to 64 KB.

2, MSP430 low power operation mode principle

TI's MSP430 is a family of microcontrollers with a special emphasis on low power consumption, especially for battery-operated, long-term applications.

2.1, operating mode

Principle and application of MSP430 low power operation mode

Figure 1 MSP430 working mode state diagram

The MSP430 series is designed for ultra-low power applications. The operating mode status is shown in Figure 1. The basic clock system operating modes are listed in Table 1. The operating mode takes into account three different requirements: low power consumption; speed and data throughput; and the minimum current consumption of a single peripheral.

Table 1 MSP430x1xx basic clock system operating mode

Principle and application of MSP430 low power operation mode

The typical current consumption of the MSP430 is shown in Figure 2.

Principle and application of MSP430 low power operation mode

Figure 2 Typical current consumption diagram for 13x and 14x devices versus operating mode

In the status register, the low power modes 0 to 4 are configured with the CPUOff, OSCOff, SCG0, and SCG1 bits. The advantage of including the above mode control bits is that the current working state can be saved on the stack in the interrupt service routine. If the SR value has not changed during the interrupt service routine, the program overflow returns to the previous working state. With the stack SR value in the interrupt service routine, the program overflow can return to a different working state. The mode control bits and stack can be accessed by any instruction.

When the control bit of any mode is set, the selected working state responds immediately. If the clock is not activated, any peripherals that are disabled from clocking are disabled, and peripherals can be disabled by setting their own control registers. All I/O port pins and RAM/registers are not changed, and all interrupts can implement wake-up functions.

2.2, enter and exit low power mode

The MSP430 can be activated by an interrupt event initiated from any low power mode of operation. 1 Enter the interrupt service routine. After the PC and SR are stored on the stack, CPUOff, SCG1 and OSCOff are automatically reset. 2 The choice returned from the interrupt service routine. The original SR is taken out of the stack and restored to its original working state. When the RETI instruction is executed, the SR bit stored in the stack can be corrected while the interrupt service routine returns to a different operating state.

The low power mode can be used to extend the lifespan because extending the low power mode period disables the DCO, and the negative temperature coefficient of the DCO should be considered. If the temperature changes a lot, the DCO frequency in wake-up mode will be significantly different from entering the low-power mode and may exceed the operating range. To avoid this, the DCO is set to the lowest value before entering a low power mode that can extend the cycle time, and the temperature of the low power mode can be changed.

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